The invention relates to semiconductor memory devices and a method of generating an internal voltage within said devices. More particularly, the invention relates to semiconductor memory devices capable of performing an overdriving operation with reduced noise and a method of generating an internal voltage in said semiconductor memory devices.
Semiconductor memory devices are constantly being made to have higher integration density, lower power consumption and higher data processing rates. As a result, the size of the various components forming semiconductor memory devices are reduced and power supply voltages applied during the operation are decreased. Thus, there is a continuing demand for various technologies that collectively cooperate to fabricate increasingly small semiconductor memory devices capable of operating at higher speed with relatively lower applied operating voltage(s). A sense-amplifier overdriving technique is one such technology.
In order to assure relatively low power consumption, most conventional semiconductor memory devices have an internal power supply voltage generation circuit receiving an external power supply voltage and generating a lower internal power supply voltage. It should be noted that conventional semiconductor memory devices use a plurality of different internal power supply voltages for various purposes. One of the internal power supply voltages supplied to a memory cell array is referred to as an array power supply voltage.
Figure (FIG.) 1 is a circuit diagram of a memory cell array of a semiconductor memory device.
When a word line WL selected by a row address is activated in the semiconductor memory device, data from a plurality of memory cells MC connected with the word line WL is transferred to a pair of bit lines BL and /BL. When sense amplifier drivers MP and MN, turned ON in response to a P sensing signal (pse) and an N sensing signal (nse), they respectively supply an array power supply voltage VINTA and an array ground voltage (VSSA) to a sense amplifier power supply line RTO and a sense amplifier ground line /S. A plurality of sense amplifiers SA are activated and operate in relation to a voltage difference between the pair of bit lines BL and /BL. As typically implemented, a large number of sense amplifiers SA operate simultaneously. Thus, it is difficult to amplify data from a large number of cells during a short period of time when the array power supply voltage (VINTA) is applied as a conventional internal array power supply voltage having a relatively low level. In other words, the bit line sensing speed of the foregoing device decreases in relation to the quantity of data being processed, and ultimately the semiconductor memory device cannot operate at a sufficiently high speed.
In addition to the foregoing limitation, the size of a metal-oxide semiconductor (MOS) transistor implementing the sense amplifier is inevitably reduced as the overall semiconductor memory device is fabricated with a higher degree of device integration. When the size of an MOS transistor of the sense amplifiers SA is reduced, it is efficient to reduce the size of p-type MOS (PMOS) transistors SP1 and SP2 which are generally formed larger than the n-type MOS (NMOS) transistors SN1 and SN2 because their inherent current driving capability is small. However, when the size of the PMOS transistors SP1 and SP2 decreases, it is difficult for the sense amplifiers SA to properly amplify data to a sufficiently high level.
To address the above-mentioned problems, a method is used which supplies an external array power supply voltage (VCCA) having a higher level than an internal array power supply voltage (IVCA) as the array power supply voltage (VINTA) to the sense amplifier power supply line RTO for a specific period of time as the sense amplifiers SA begin operation to thereby drive the sense amplifiers SA. This approach is commonly referred to as sense amplifier overdriving. That is, the sense amplifiers SA receive the external array power supply voltage (VCCA) as the array power supply voltage (VINTA) through the sense amplifier power supply line RTO during an overdriving operation, and the internal array power supply voltage (IVCA) as the array power supply voltage (VINTA) during a sensing operation.